1. Field of the Invention
The invention is related to a semiconductor device having a dielectric thin film for a high frequency transmission line on the surface of a semiconductor substrate. And especially, the invention pertains to the high frequency semiconductor devices operating in microwave or millimeter wave bands, and to high frequency semiconductor integrated circuits such as Microwave Monolithic Integrated Circuits (MMICs).
2. Description of the Related Art
By the rapid increase of demands for the recent information communication fields, it becomes urgent to increase the communication channel number. Therefore, the practical communication systems using the microwave or millimeter waves, which have not been so widely used up to now, are required to be exploited rapidly. RF part of the high frequency communication instrument is generally composed of an oscillator, a synthesizer, a modulator, a power amplifier, a low-noise amplifier, a demodulator and an antenna, etc. In the radio communication instrument, the excellent electrical characteristics and the miniaturized package size are desired. For integrating the necessary circuits in one semiconductor chip, the configuration of the MMIC is desirable, when the miniaturization of the chip size of the high frequency semiconductor integrated circuit is considered. With the development of the semiconductor integrated circuit technology, the degree of the one chip integration of the MMIC is rapidly advancing. That is to say, the number of circuits merged in a single semiconductor chip is increasing so as to increase the integration density. Therefore, integration density is increasing from the simple conventional semiconductor chip mounting discrete semiconductor active elements to a higher density semiconductor chip, which merges functional blocks fulfilling predetermined circuit functions, respectively. In addition, as the integration density rises, the complicated and sophisticated configurations, by which multiple functional blocks are mounted on an identical semiconductor chip, are also being developed.
In the MMIC, semiconductor active elements, such as high electron mobility transistors (HEMTs), heterojunction bipolar transistors (HBTs), or Schottky gate FETs (MESFETs), and passive elements such as capacitors, inductors and high frequency transmission lines, etc. are merged in a single semiconductor chip. The known and typical types of the high frequency transmission line used, in general, for the MMIC operating at microwave or millimeter wave bands are the Micro Strip line (hereinafter abbreviated as xe2x80x9cMSLxe2x80x9d) and the Coplanar Waveguide (hereinafter abbreviated as xe2x80x9cthe CPWxe2x80x9d).
FIG. 1 is a sectional view showing example of wiring metal of the high frequency semiconductor device, which is cited as a base, or an illustrative example of the present invention. The metal patterns 61,62,63 are disposed on the top surface of a semiconductor substrate 1. Employing the narrow central metal strip 63 and a couple of wide ground metal plates 62 sandwiching the central metal strip 63, the CPW 7 is constructed. In FIG. 1, the broken lines between the central metal strip 63 and the ground metal plates 62 typically show the electric fields E. The instantaneous direction of the electric fields E changes with time according to the operation frequency. And, the MSL 13 are constructed with the bottom ground metal plate 12 disposed on the bottom surface of the semiconductor substrate 1 and the narrow metal strip 61 disposed on the top surface of the semiconductor substrate 1. The broken lines between the bottom ground metal plate 12 and the metal strip 61 are the electric fields E. By the methodology arranging the CPW 7 and the MSL 13 structures on an identical plane level on the semiconductor substrate 1 as shown in FIG. 1, the occupation area for wirings of the semiconductor device must inevitably become wide.
Therefore, the structure for the high frequency semiconductor device employing the dielectric thin film 3 as shown in FIG. 2 was proposed for further miniaturization of the device size. In FIG. 2, the first metal layer (64, 65) is disposed on the top surface of semiconductor substrate 1, and the dielectric thin film 3 covers the top surface of the first metal layer (64, 65). The second metal layer (61a, 61b) are disposed over this the dielectric thin film 3. In FIG. 2, two thin film microstrip lines (hereinafter abbreviated as xe2x80x9cthe TFMSLsxe2x80x9d) 6 are constructed between the second metal layer 61a and the first metal layer 64, and between the second metal layer 61b and the first metal layers 64. In addition, employing a couple of wide metal plates 64 sandwiching the central narrow metal strip 65, all are disposed under the dielectric thin film 3 as the first metal layer, the CPW 7 is constructed. In FIG. 2, broken lines respectively show the electric fields E between the second metal layer 61a and the first metal layer 64, between the second metal layer 61b and the first metal layer 64, and between the first metal layer (64, 65). Hence, the miniaturization of the chip size is being attempted by sandwiching the dielectric thin film 3 with the first metal layer (64, 65) and the second metal layer (61a, 61b) so as to reduce the wiring area for the high frequency transmission lines.
As described above, in the high frequency semiconductor device having the dielectric thin film, as shown in FIG. 2, the CPW, the TFMSL structures are preferable for the high frequency transmission lines. However, xe2x80x9cthe effective dielectric constant ∈effxe2x80x9d of the CPW structure shown in FIG. 2 must become larger than that shown in FIG. 1, on which there is no covering dielectric layer on the CPW structure. Namely, the effective dielectric constant ∈eff of the CPW 7 constructed with the first metal layer (64, 65) and the second metal layer 61a, 61b must increase, since the dielectric thin film 3 having the same thickness as the dielectric layer of the TFMSL structure is stacked on the CPW 7. xe2x80x9cThe effective dielectric constant ∈effxe2x80x9d is an virtual dielectric constant of a homogeneous dielectric material, which determines the CPW high frequency transmission characteristics, assuming that the CPW is surrounded by spatially infinite dielectric material. Or, the effective dielectric constant ∈eff may be defined as the dielectric constant of the homogeneous dielectric material disposed within the range to which effective electromagnetic fields from the CPW structure can affect. For example, the effective dielectric constant ∈eff of the CPW 7 shown in FIG. 1 is determined both by the dielectric constant ∈0 of the air and the dielectric constant ∈s of semiconductor substrate 1, through which the electric fields E penetrating. In the meantime, the effective dielectric constant ∈eff of the CPW 7 shown in FIG. 2 is determined both by the dielectric constant ∈i of the dielectric thin film 3 and the dielectric constant ∈s of semiconductor substrate 1. However, the dielectric constant ∈i of the dielectric thin film 3 is larger than dielectric constant ∈0 of the air. Therefore, the effective dielectric constant ∈eff of the CPW 7 shown in FIG. 2 becomes larger than the corresponding effective dielectric constant ∈eff of the CPW 7 shown in FIG. 1. And, the characteristic impedance Z0 of the CPW 7 shown in FIG. 2 decreases significantly, because it is proportional to the reciprocal of the square root of the effective dielectric constant ∈eff, so that the characteristic impedance Z0 of the CPW 7 shown in FIG. 2 becomes lower than structure shown in FIG. 1. And, by the increase of the effective dielectric constant ∈eff, the crosstalk between adjacent CPWs increases in the structure shown in FIG. 2. Therefore, according to the background art shown in FIG. 2, there was a problem which inevitably deteriorates the high frequency performance of the high frequency amplifier, if the high frequency amplifier is constituted with the CPW structure shown in FIG. 2.
And, in the high frequency semiconductor device operating in microwaves bands or millimeter wave bands, such as the MMIC, the disadvantage of the narrowed fabrication tolerance increases when the operation wavelength becomes shorter and shorter. Therefore, there is a large necessity of adjustments in the post-manufacturing stage, in which the electrical characteristics such as the high frequency transmission characteristics and the high frequency impedance must be adjusted.
The structures of the stubs for adjusting the electrical characteristics of the MSL 13 on the MMIC, according to the background art of the present invention, are shown in FIGS. 3A and 3B. FIG. 3B is a sectional view along Ixe2x80x94I direction of FIG. 3A. The MSL 13 are constituted by a bottom ground metal 12 formed on a bottom surface of semiconductor substrate 1 such as gallium arsenide (GaAs) and an metal strip 44 formed on a top surface of semiconductor substrate 1. Metal islands 66 are arranged in the matrix form in both sides of and in the vicinity of the metal strip 44 formed on the top surface of semiconductor substrate 1. By connecting the metal strip 44 and the nearest metal island 66 by a bonding wire 48, etc., so as to construct the stub, or by connecting, in addition, between the metal islands 66 successively by bonding wires 48, etc., the adjustment of the electrical characteristic of the MSL 13 shown in FIGS. 3A and 3B can be accomplished.
In the meantime, there is a problem that we must find out an empty space for arranging the adjustment patterns, in the case of the electrical characteristic adjustment of the CPW structure merged in the MMIC, according to the background art of the present invention. This is the inevitable and structural result, since a couple of wide ground metal plates of 150 xcexcm width or about 300 xcexcm width, at both sides of the central metal strip must be disposed. This becomes the serious disadvantage, when further miniaturization is considered, for the high frequency semiconductor devices or the MMIC.
The present invention was made considering the above circumstance.
An object of the present invention is to provide a high frequency semiconductor device having a new structure that can reduce the effective dielectric constant e eff associated with a high frequency transmission line constituting a high frequency semiconductor device.
Another object of the present invention is to provide a high frequency semiconductor device having a new structure, which can extend the adjustable range of characteristic impedance Z0 of a high frequency transmission line.
A further object of the present invention is to provide a high frequency semiconductor device having a new structure, which can reduce the high frequency loss effectively, and further can reduce the crosstalk.
An additional object of the present invention is to provide a high frequency semiconductor device, which can efficiently and respectively arrange two kinds of high frequency transmission line of different structures in a limited planar space, and can decrease the occupation area necessary for the wirings as a whole.
An additional object of the present invention is to provide a high-performance and high frequency semiconductor device with the wiring structure so as to reduce effectively the open circuit failures at uneven surface portion and/or a step portion.
An additional object of the present invention is to provide a high frequency semiconductor device with a high frequency transmission line in which adjustments of electrical characteristics at the high frequency band are easy.
An additional object of the present invention is to provide a semiconductor integrated circuit having a new structure which can reduce the effective dielectric constant ∈eff of a high frequency transmission line, more and more.
An additional object of the present invention is to provide a semiconductor integrated circuit, which can extend the adjustable range of characteristic impedance Z0 of a high frequency transmission line.
An additional object of the present invention is to provide a semiconductor integrated circuit having low transmission loss and can reduce the crosstalk between high frequency transmission lines disposed on a same chip.
An additional object of the present invention is to provide a semiconductor integrated circuit, by which the miniaturization of chip area is easy, disposing efficiently two kinds of high frequency transmission line of the different structures in the limited planar space so as to decrease the occupation area necessary for the wirings.
An additional object of the present invention is to provide a high-performance semiconductor integrated circuit, in which the open circuit failure at an uneven surface portion and/or a step portion is reduced.
An additional object of the present invention is to provide a semiconductor integrated circuit having high frequency transmission lines, in which the adjustment of electrical characteristics, or the high frequency impedance, the transmission characteristics or the high frequency gain are easy.
In order to achieve these objects of the present invention, the first feature of the present invention inheres in a high frequency semiconductor device comprising a substrate, a first metal layer disposed above the substrate, a first dielectric thin film disposed at least on the first metal layer; and a second metal layer comprising a second metal strip, disposed on the first dielectric thin film. Here, the first metal layer comprises a first metal strip, first and second ground metal plates sandwiching the first metal strip, each being isolated from the first metal strip. And first dielectric thin film is disposed at least on a part of the first ground metal plate. In addition, the dielectric structure on the first metal strip differs from the dielectric structure under the second metal strip.
In the present invention, xe2x80x9cdielectric structurexe2x80x9d means the thickness and/or the dielectric constant of the dielectric thin film. For example, it is possible to differentiate the dielectric structure on the first metal strip from the dielectric structure under the second metal strip by totally removing the first dielectric thin film on the first metal strip. And, it is possible to make the dielectric structure on the first metal strip different from the dielectric structure under the second metal strip, by the structure that a thin extension part of the first dielectric thin film is disposed on the first metal strip. The extension part of the first dielectric thin film has the thickness thinner than the thickness between the second metal strip and the first ground metal plate.
Still, it should be minded, in the high frequency semiconductor device according to the first feature of the present invention, a modified structure stacking a second dielectric thin film on the second metal strip can also be included. Furthermore, another modified structures stacking a third, a fourth . . . , dielectric thin films on the second dielectric thin film are also possible according to the first feature of the present invention.
For example, for the case that the CPW structure is constituted by the first metal strip, the first and second ground metal plates, if the thickness of dielectric thin film formed on the first metal strip is made thinner than thickness of the part under the second metal strip, including up to zero thickness so as to differentiate the dielectric structure between them, the effective dielectric constant ∈eff around the CPW can be reduced. That is, the effective dielectric constant ∈eff of the CPW portion is made lower than that of the conventional CPW as shown in FIG. 2. As already stated, the conventional CPW employs a uniform and homogenous dielectric structure so that the CPW portion 7 has the same thickness of the TFMSL portion 6. By this dielectric structure architecture, it is possible to reduce the transmission loss, while extending the adjustable range of the characteristic impedance Z0. And further the crosstalk between adjacent CPWs is reduced. And, it is possible to constitute the TFMSL structure by the second metal strip and the first ground metal plate on a same semiconductor substrate. Namely, it is possible to dispose both the TFMSL and the CPW structures on the same semiconductor substrate efficiently utilizing a limited planar space. Therefore, the occupation area necessary for the wirings for the high frequency transmission lines, as a whole, can be decreased.
In the high frequency semiconductor device according to the first feature of the present invention, an open stub and a short stub for adjusting the high frequency impedance of the high frequency transmission line can be constituted using a metal island and the first ground metal plate, if the second metal strip is made to be the metal island. The first dielectric thin film for constituting open stub and short stub can be disposed in the empty space of the first ground metal plate in which the width is wide. Therefore, it is advantageous that the area efficiency is good, because the adjustment of electrical characteristics such as impedance and transmission characteristics of the CPW becomes possible without specially preparing the occupation area of the open and short stubs.
The second feature of the present invention lies in a semiconductor integrated circuit comprising a substrate, first and second ground metal plates, a semiconductor active element, input and output metal strips connected to the semiconductor active element, first and second dielectric thin films, and the first and second stub wirings. Here, the first and second ground metal plates are disposed above the substrate, spatially isolated from and facing to each other. The semiconductor active element is sandwiched between the first and second ground metal plates, and has first, second and third electrodes. The input metal strip is connected to the third electrode, and is sandwiched between the first and second ground metal plates. The output metal strip is connected to the second electrode, and is sandwiched between the first and second ground metal plates. The first dielectric thin film is disposed at least on a part of the first ground metal plate, and the second dielectric thin film is disposed at least on a part of the second ground metal plate. The first stub wiring is disposed on the first dielectric thin film, and is connected to the input metal strip. The second stub wiring is disposed on the second dielectric thin film, and is connected to the output metal strip. In addition, the dielectric structures on the input and output metal strips differ from the dielectric structures under the first and second stub wirings, respectively.
As already stated in the first feature of the present invention, the xe2x80x9cdielectric structurexe2x80x9d means the thickness and/or the dielectric constant of the dielectric thin film. For example, it is possible to differentiate the dielectric structure on the input and output metal strips from the dielectric structure under the first and second stub wirings by totally removing the first dielectric thin film on the input and output metal strips. And, it is possible to make the dielectric structure on the input and output metal strips different from the dielectric structures under the first and second stub wirings, by the structure that a thin connection part of the first and second dielectric thin films is disposed on the first metal strip. The connection part of the first and second dielectric thin films has the thickness thinner than the thickness of a part just under the first and second stub wirings.
In the semiconductor integrated circuit according to the second feature of the present invention, it is possible to use various high frequency semiconductor elements such as a HEMT, a bipolar transistor (BJT) including a HBT, a MESFET and a static induction transistor (SIT) for the xe2x80x9csemiconductor active elementxe2x80x9d. And, xe2x80x9cthe first electrodexe2x80x9d of the semiconductor active element means one of emitter, collector and base electrodes for BJT, and one of source, drain and gate electrodes for HEMT, MESFET, SIT. xe2x80x9cThe second electrodexe2x80x9d means the another one of the emitter, collector and base electrodes for BJT, and another one of the source, drain and gate electrodes for HEMT, MESFET, SIT. That is to say, the second electrode can be the emitter region, if the first electrode is the collector region, and the second electrode can be the drain region, if the first electrode is the source region. Of course the xe2x80x9cthird electrodexe2x80x9d of semiconductor active element means the remaining one of emitter, collector and base electrodes of BJT and the remaining one of source, drain and gate electrodes of HEMT, MESFET, SIT other than first and second electrodes.
For example, a combination of the input metal strip, the first and second ground metal plates can constitute a first CPW, and another combination of the output metal strip, the first and second ground metal plates can constitute a second CPW. Further it may be possible to constitute a first TFMSL with the first stub wiring and the first ground metal plate. Similarly, the second stub wiring and the second ground metal plate can constitute a second TFMSL. Then, by making the thickness of dielectric thin film on the first and second CPW portions thinner than thickness of dielectric thin film of the first and second TFMSL portions, the respective dielectric structures are configured to be different from each other, and it is possible to reduce the effective dielectric constant ∈eff of the first and second CPW portions. That is, the effective dielectric constant ∈eff of the CPW portions are made lower than that of the conventional CPW as shown in FIG. 2. As the result, it is possible to extend the adjustable range of the characteristic impedance Z0 of the first and second CPW portions. Further, they can have low transmission losses. And the performance of low crosstalk between the CPW portions is achieved. And it is possible to realize a high-performance semiconductor integrated circuit. And, it is also possible to dispose both the first and second TFMSLs and the first and second CPWs in a limited planar space on a same semiconductor chip. Therefore, the necessary occupation area, as a whole, for the wirings of the semiconductor integrated circuit can be decreased.
The third feature of the present invention lies in a semiconductor integrated circuit having a substrate, the first and second ground metal plates, a semiconductor active element, an input metal strip, an output metal strip, a dielectric thin film, a first stub wiring, and a second stub wiring. Here, the first and second ground metal plates are disposed above the substrate, spatially isolated from and facing to each other. The semiconductor active element is sandwiched between the first and second ground metal plates, and has first, second and third electrodes. The input metal strip is connected to the third electrode, and is sandwiched between the first and second ground metal plates. The output metal strip is connected to the second electrode, and is sandwiched between the first and second ground metal plates. The dielectric thin film is unevenly disposed on the first ground metal plate, the input metal strip, the output metal strip and the second ground metal plate. And the dielectric thin film has a thin layer formed on the input and output metal strips so as to form a concave above the input and output metal strips. The thin layer has the thickness thinner than the thickness of a part just under the first and second stub wirings. Then the dielectric structures on the input and the output metal strips are configured such that they differ from those under the first and second stub wirings. The first stub wiring is disposed on the dielectric thin film, and is connected to the input metal strip. And the second stub wiring is disposed on the dielectric thin film, and is connected to the output metal strip.
In the semiconductor integrated circuit according to the third feature of the present invention, various high frequency semiconductor elements such as a HEMT, a BJT, a MESFET and a SIT can serve as the xe2x80x9csemiconductor active elementxe2x80x9d. Similar to the second feature of the present invention, a combination of the input metal strip, the first and second ground metal plates can constitute a first CPW, and another combination of the output metal strip, the first and second ground metal plates can constitute a second CPW. Further it may be possible to constitute a first TFMSL with the first stub wiring and the first ground metal plate. Similarly, the second stub wiring and the second ground metal plate can constitute a second TFMSL. Then, it is possible to reduce the effective dielectric constant ∈eff of the first and second CPW portions. As the result, it is possible to extend the adjustable range of the characteristic impedance Z0 of the first and second CPW portions. Further, they can have low transmission losses, and the performance of low crosstalk between the CPW portions is achieved. And it is possible to realize the high-performance semiconductor integrated circuit, disposing both the first and second TFMSLs and the first and second CPWs in a limited planar space on a same semiconductor chip. Therefore, the necessary occupation area, as a whole, for the wirings of the semiconductor integrated circuit can be decreased.
Other and further objects and features of the present invention will become obvious upon an understanding of the illustrative embodiments about to be described in connection with the accompanying drawings or will be indicated in the appended claims, and various advantages not referred to herein will occur to one skilled in the art upon employing of the invention in practice.